1. Technical Field
Various embodiments of the present disclosure generally relate to a method for manufacturing a semiconductor device, and, more particularly, to a method for manufacturing a semiconductor device using an overlay vernier.
2. Related Arts
A semiconductor device having cell transistors may include various driver circuits to drive the cell transistors. The processing steps of semiconductor device fabrication may include patterning. The cell transistors and the driver circuits may be formed with patterns stacked at different levels. Each pattern at each level may be formed by a masking process. The masking process may include a deposition of material layers to be etched and a patterning of the material layers using an exposure mask. When the cell transistors and the driver circuits are formed using multiple masking processes, an alignment accuracy between the patterns formed by different masking processes may be checked. In order to check the alignment accuracy, an overlay vernier may be employed.